Summary of the final report of the research project: IGF Project 20132 N – AgOn3D
“Silver sintered on 3D ceramic substrates for electronics in high temperature applications”
Scientific-technical and economic problems
Spatial circuit carriers in conventional MID technology offer a high degree of freedom of design as well as rationalization and miniaturization potential for electronics integration. Furthermore, material and cost savings can be achieved by integrating the third dimension in the circuit carrier. By adapting to spatial conditions, valuable installation space can be used efficiently and sensor concepts with a high degree of integration can be implemented.
Three-dimensional circuit carriers made of plastic (Molded Interconnect Devices – MIDs) enable electronics and mechanics to be merged into complex and highly integrated mechatronic assemblies, which is why they are sometimes referred to as mechatronic integrated devices. Due to legal regulations, new installation locations, increasing reliability requirements and increasing integration, a growing proportion of MIDs is exposed to ever higher stresses.
The use of conventional spatial circuit carriers has so far only been possible to a limited extent in harsh environments. Due to the limited application temperature of thermoplastics, the potential of spatial assemblies cannot be fully exploited. By using thermally more resistant thermosetting plastics, the thermal application range of the substrate can be shifted slightly to higher temperatures. Both in the automotive sector and in industrial applications, the requirements for the maximum ambient temperature of the electronics and the degree of integration of the assemblies are increasing, for example through installation close to the engine or sensors in the exhaust system. Therefore, ceramic circuit carriers, which, in addition to high heat resistance, also have excellent chemical resistance, are particularly suitable for such applications. Due to their high thermal conductivity, planar ceramic substrates as so-called direct copper bonded substrates are already being used in large numbers as circuit carriers in power electronics. The circuit layout of these substrates, however, follows a purely two-dimensional design strategy.
Several metallization processes have become established in plastic MID technology. These range from the two-component injection molding process to hot stamping and laser direct structuring (LDS). The LDS process is a very attractive manufacturing technology that enables three-dimensional metallization of the substrates. The LDS method is the most widespread and enables an individual and three-dimensional circuit layout. These methods can only be implemented with conventional MID circuit carriers made of plastic and are therefore not suitable for the implementation of connection surfaces and conductor tracks on substrates that are suitable for high temperatures.
Ceramic substrates for thermally demanding conditions are becoming increasingly popular in the field of power electronics and LED technology. Direct copper bonding (DCB), thick film technology and burn-in ceramics (LTCC and HTCC) have established themselves as essential processes for producing suitable metallization on ceramic substrates. While these methods are tried and tested options for realizing circuit layouts on flat ceramic substrates, there are severe limitations in the implementation of three-dimensional circuit layouts.
With thick film technology and the LTCC process, the conductor pattern is implemented by applying metal paste using the screen printing process. The direct copper bonding process enables the application of circuit structures made of copper by vitrifying copper foils with the ceramic substrate. In the subsequent etching and deposition processes, the conductor track and connection structures as well as refined end surfaces are realized. These methods cannot therefore be transferred to three-dimensional bodies and connection surfaces.
In order to be able to economically apply a three-dimensional layout to a ceramic circuit carrier, a standard structuring and metallization process cannot be used, but an additive and flexible process must be used. For use at high temperatures, the joining processes for component assembly must also be viewed critically. Several joining processes and connection media have become established in MID technology. In addition to solder pastes, adhesives are also proven joining media. In the case of MID technology based on plastics, the maximum temperature resistance and resistance of the plastic used must be taken into account.
The so-called dispensing process is often used on three-dimensional circuit carriers, in which the joining material is applied with a special metering valve. Due to the time required, dispensing increases the cycle time compared to stencil printing, but allows a high degree of flexibility in terms of layout and dispensing volume. The most common method used in MID electronics is reflow soldering in continuous convection ovens. Surface-Mounted-Devices (SMD) or z. B. bare chips are soldered or glued to the spatial substrate.
The Restriction of Hazardous Substances (RoHS) guidelines, which came into force in 2006 and amended in 2011, prohibit lead-containing solders that have been used up to now. This led to the search for alternative materials and joining concepts that correspond to the new guideline and meet future requirements and trends such as increasing ambient temperatures in the automotive sector or new high-temperature applications in industrial processes . The melting point of the solder alloys used in the electronics industry and MID technology since RoHS is between 217 ° C and 224 ° C (e.g. SnAg3.5Cu0.7, Sn96.5Ag3.5).
In the case of cyclical thermal loads, the solder joint fatigues until it fails. Under harsh conditions, SAC solder sometimes even fails earlier than the now banned SnPb solder. Thus, the contacting of electronics with the SAC solders used today in MID technology as joining materials for high temperature applications is not expedient. The increasing requirements for the integration of assemblies, the harsher environmental conditions, the new fields of application and installation situations mean that the standard technologies for the spatial integration of electronics can only be used to a limited extent for high temperatures.
One possibility for additive metallization is generative direct coating processes such as plasma coating. Various systems for metallization from cold-active plasma are already commercially available today. With the help of these coating processes, structures made of powder-like materials, such as metals, can be applied to various substrates (e.g. plastics, ceramics, semiconductors) without contact or solvents. The advantages lie in the high application speed, a variable layer thickness for an optimized connection and the inline capability of the system. The central aspect of the system is the use of a cold-active atmospheric plasma, which, due to its low working temperature, results in a correspondingly low surface temperature on the substrate surface. The layers are deposited using a powder-gas mixture.
Basically, a carrier gas flow has to be mixed with a material in powder form. The fine-grained powders used with grain sizes between 100 nm and 20 μm can be based on metallic (Cu, Sn, Zn, Ag) or non-metallic raw materials. The challenge lies in the formation and reliability of the required bond between the substrate and the generated layer. This is influenced by numerous factors.
In addition to the process-related parameters, such as the amount of powder and gas supplied, the distance between the plasma nozzle and the substrate and the coating speed, the properties of the substrate surface also have an effect on the adhesive strength of the layer produced. A defined roughness promotes the adhesion between the conductive layer and the substrate, but can be a hindrance if the Rz values are too high. Since the result of this coating process is to serve as a connection surface, it is important to use suitable additive manufacturing parameters to achieve uniform layer thicknesses on spatial ceramics and to avoid inhomogeneities in the material properties of the printed layers. The challenge here is to find the optimal combination from the wealth of possible variations. The economic aspects can be taken into account through the use of inexpensive, base materials, which, however, give rise to further challenges. The high oxidation readiness of pure copper powder makes it necessary, for example, to passivate or clean the layer produced immediately after the coating process. The innovative system technology makes it possible to apply the copper surface and then to coat it with a passivation layer or to clean it in one process cycle. The challenge here lies in the combination of process parameters. The contacting of the layers produced with the overall system poses a challenge with regard to the construction and connection technology. It is important to consider whether modern connection materials can guarantee reliable connection technology.
An alternative to the conventional soldering process is the so-called low-temperature connection technology (NTV), also known as silver sintering. The silver sintering technology has its origins in applications in power electronics, where in recent years it has increasingly replaced the previous soldering technology, since the silver sintering technology was based on tin -Silver alloys based soldering technology is superior in terms of electrical conductivity, thermal conductivity and coefficient of thermal expansion (CTE). In this technology, silver particles, which are pressed together between the contact surfaces at high pressure and temperatures of around 250 ° C, replace the previous layer of solder. By compressing the silver particles and inducing diffusion processes, a very reliable material connection is formed. This new technology is characterized by high load cycle resistance. The low material fatigue at regular operating temperatures of power electronics (approx. 150 ° C – 175 ° C) is due to the high melting point of the NTV layer (approx. 961 ° C), which also enables use at high ambient temperatures.
For low-temperature connection technology, on the one hand sintering with and on the other hand sintering without external isostatic pressure can be distinguished. In the pressure sintering process used in power electronics (see Figure 10), after the silver sintering paste has been applied to a DCB substrate, the printed substrate is dried in a stencil printing process. The silicon chips are then fitted onto the dry paste. The actual joining process takes place at 230 ° C – 250 ° C in a press and takes approx. 3 – 5 minutes . The pressurization of 10 – 30 MPa  leads to a higher density of the silver sintered layer, shorter process times and higher strength.
In the pressureless sintering process, there is no drying step after printing or dispensing the sinter paste. The component is fitted onto the moist sintered paste layer and sintered in a convection oven at 230 ° C. for 90 minutes. The joining layers produced in the pressureless process have lower strength values than the pressure-sintered layer. B. to join LEDs with the silver sintering technology and to achieve high reliability and temperature stability of the joining layer. Silver sintered materials represent an innovative joining technology; the high melting point of silver enables higher operating temperatures compared to conventional joining materials. The low CTE of silver compared to standard solder material leads to increased reliability of the joint. So far, however, these advantages have only been impressive in planar applications in power electronics and lighting technology. The combination of silver sintering technology with the possibilities of spatial circuit carriers results in new challenges for material and process technology.
Challenges arise primarily in the area of additive manufacturing and connection technology. The structures produced on the ceramic and the joining layer between the connection surface and the component must meet the thermomechanical requirements at high ambient and operating temperatures. This requires coordinated materials and processes. The sintering on additively manufactured connection surfaces stands out in terms of the application of the sintering paste, the assembly process and the sintering process from previously common planar applications.
In order to use the advantages of the silver layer on non-planar connection surfaces of spatial circuit carriers, no standard process can be used. The main challenge is to create a reliable, high-strength joint between ceramic and conductor track metallization, as well as between connection surfaces and component using silver sintered material. For this purpose, the materials and processes of the additive manufacturing of conductor structures and the silver sintering technology have to be coordinated. The materials used in the additive manufacturing of connection surfaces made of silver or copper have not yet been sufficiently characterized and tested for silver sintering technology.
Since the connection to the substrate metallization occurs during silver sintering through the diffusion of silver particles, the silver particles and the surface topology of the connection area and its material have a major influence on the joining result. The materials and process parameters must be selected and coordinated with one another in such a way that it is possible for the silver particles to sinter with the additively created connection surfaces to form a solid connection layer.
Using the method of additive manufacturing, uniform layer thicknesses of connection surfaces and conductor tracks on spatial ceramics are to be achieved and inhomogeneous material properties of the printed layers are to be avoided. The transition from planar application to three-dimensional substrates poses considerable challenges to sinter paste application, to the assembly process and above all to the sintering process and its process parameters (sintering time, temperature, pressure and process atmosphere).
The fields of application of silver sintering technology on three-dimensional ceramic circuit carriers include not only the area of sensors but also the area of lighting and power electronics. Power LEDs generate a high level of heat that must be efficiently dissipated in order to prevent damage to the LEDs, color changes and premature failure due to thermal aging or overload. In power electronics, semiconductors are already joined using the silver sintering technique. B. in the case of power modules installed close to the engine, limits are set by the previous module structures. Thanks to the excellent chemical resistance of the ceramics, these circuit carriers can also be used in areas that were previously not possible with plastic MIDs.
This shows that the combination of three-dimensional ceramic circuit carriers with silver sintering technology is not to be understood as a substitute for previous, established MID and joining technology, but as an expansion of the range of applications. The combination of technologies allows a high degree of design freedom and high temperature resistance and reliability. The optional use of this method increases the application possibilities and enables the component size to be minimized and the geometry to be optimized to the conditions of the installation site.
Current trends in electronics production and in particular in power electronics require the use of flexible and innovative production technologies in order to enable greater functional integration with increased reliability and efficiency as miniaturization progresses. Furthermore, the use of new component technologies (e.g. wide-band gap) requires an expansion of the operating parameters, which requires the development and use of high-temperature-stable construction and connection technologies. The “AgOn3D” project has investigated an alternative concept for the selective metallization of spatial ceramic circuit carriers on which components (e.g. sensors, logic, etc.) are contacted efficiently, reliably and robustly using pressureless sintering processes. Current processes and concepts are thermally limited due to the use of polymeric circuit carriers and solder-based AVT, which excludes the use of more efficient and high-performance components. The examined manufacturing concept offers through the use of high-performance substrate technologies; higher thermal stability through the use of ceramics, higher current carrying capacity through robust and more massive copper conductor tracks and greater freedom of design and functional integration through the use of spatial circuit carriers, here immense advantages. The use of a pressureless silver sintering paste enables a high temperature stable and mechanically robust connection with which a long service life with high system reliability is given. The benefits of the knowledge gained in this project are therefore of particular benefit to companies in the SME sector, whose focus is on power electronic packaging technologies, sensor applications or material and system technology.
The current advancing electrification presents current production concepts with major challenges and shows their limits. Particularly in harsh environmental conditions such as wind parks (offshore and onshore) or automotive applications for electromobility, there is an immense need for more reliable and efficient electronics. Spatial ceramic circuit carriers, individually and flexibly structurable in connection with innovative and high-performance assembly and connection technology addresses this requirement. The summary of the relevant process steps of metallization and subsequent contacting contains an enormous economic potential, since from a production and process-technical point of view, both flexibility and an increase in reliability and efficiency and thus also quality can be achieved. The reduction in the complexity of the metallization process also enables SMEs to access or independently process copper-plated semiconductor components. Due to its thermal, electrical and mechanical properties, silver sintering technology is a highly attractive joining technique for high-performance semiconductor modules and sensor technology in harsh environmental conditions. A silver sintering process enables high temperature resistance of the joint and enables new areas of application for sensor and circuit elements. A pressureless sintering process enables the connection to planar but also spatial substrate surfaces and can thus combine the technological advantages of silver sintering with greater freedom of design, miniaturization potential and application orientation. The final application of the results is possible across many industries, such as drive technology, energy technology, microsystem technology, automation technology, medical technology, information and communication technology.
Further information on the project can be found here.